| 摘要 |
<p>The present invention is provided with a decoder which, from one instruction, reads information indicating a bit string store region, information specifying a first bit range, and information specifying a second bit range consecutive to the first bit range in order to output a decode signal corresponding to the read information; and a bit operation circuit which, in accordance with the decode signal output from the decoder, inserts a bit string comprising identical predetermined values between the first bit range and the second bit range for the bit string stored in the bit string store region so as to generate and output an output bit string.</p> |
