| 摘要 |
The specification describes a leadframe that is aimed at high-performance digital IC devices with high-pin counts, and packaged using wire bond technology. According to the invention the configuration of the paddle is modified to add a new dimension to the leadframe design. In a preferred embodiment, one or more slots are formed in the paddle to allow the length of selected wire bonds to be reduced. This reduces the susceptibility of these selected leads to parasitic capacitances. The selected leads are typically those that carry very high-speed signals. |
