发明名称 Clocking architectures in high-speed signaling systems
摘要 Clocking systems and methods are provided below that accurately clock per-pin data transfers of input/output (IO) circuits of integrated circuit devices. These multiplexer-based clock selection systems use a dedicated multiplexer to receive clock signals from multiple mixer circuits and in turn to provide a selected reference clock signal for use by an interface circuit in transferring data to other integrated circuit devices. The timing of the selected reference clock signal is synchronized with the data signals to provide optimal sampling of the data signals. The multiplexer-based clock selection system is for use in memory interfaces of high-speed signaling systems for example.
申请公布号 US8270501(B2) 申请公布日期 2012.09.18
申请号 US20040921576 申请日期 2004.08.18
申请人 BEST SCOTT C.;RAMBUS INC. 发明人 BEST SCOTT C.
分类号 H04K1/10;H04L27/28 主分类号 H04K1/10
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