发明名称 PARALLEL ARRAY ARCHITECTURE FOR GRAPHICS PROCESSOR
摘要 <P>PROBLEM TO BE SOLVED: To provide a graphics processor that can adapt to varying loads on different shaders while maintaining a high degree of parallelism. <P>SOLUTION: A parallel array architecture for a graphics processor includes: a multithreaded core array including a plurality of processing clusters, each processing cluster including at least one processing core for executing a pixel shader program that generates pixel data from coverage data; a rasterizer for generating coverage data for each of a plurality of pixels; and pixel distribution logic for distributing the coverage data from the rasterizer to one of the processing clusters in the multithreaded core array. The pixel distribution logic selects one of the processing clusters to which the coverage data for a first pixel is to be distributed at least partially depending on a position of the first pixel within a range of an image area. The pixel data is directly distributed from the processing cluster to an appropriate frame buffer section. <P>COPYRIGHT: (C)2012,JPO&INPIT
申请公布号 JP2012178158(A) 申请公布日期 2012.09.13
申请号 JP20120040562 申请日期 2012.02.27
申请人 NVIDIA CORP 发明人 JOHN M DANSKIN;MONTRIM JOHN S;JOHN ERIK LINDHOLM;MOLNAR STEVEN E;FRENCH MARC J
分类号 G06T15/00;G06T1/20 主分类号 G06T15/00
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