发明名称 PROCESSOR TO EXECUTE SHIFT RIGHT MERGE INSTRUCTIONS
摘要 Method, apparatus, and program means for performing bitstream buffer manipulation with a SIMD merge instruction. The method of one embodiment comprises determining whether any unprocessed data bits for a partial variable length symbol exist in a first data block is made. A shift merge operation is performed to merge the unprocessed data bits from the first data block with a second data block. A merged data block is formed. A merged variable length symbol comprised of the unprocessed data bits and a plurality of data bits from the second data block is extracted from the merged data block.
申请公布号 US2012233443(A1) 申请公布日期 2012.09.13
申请号 US201213477544 申请日期 2012.05.22
申请人 SEBOT JULIEN;MACY WILLIAM W.;DEBES ERIC;NGUYEN HUY V. 发明人 SEBOT JULIEN;MACY WILLIAM W.;DEBES ERIC;NGUYEN HUY V.
分类号 G06F9/315;G06F9/30;G06F9/302;G06F9/308;G06F9/38;G06F17/14 主分类号 G06F9/315
代理机构 代理人
主权项
地址
您可能感兴趣的专利