发明名称 SEMICONDUCTOR DEVICE
摘要 <P>PROBLEM TO BE SOLVED: To improve a reference potential generating circuit for use in a calibration circuit. <P>SOLUTION: A semiconductor device comprises: a replica buffer 110 driving a calibration terminal ZQ; a reference potential generating circuit 200 generating a reference potential VREF; a comparator circuit 151 comparing a potential appearing at the calibration terminal ZQ with the reference potential VREF; and a control circuit 140 changing the output impedance of the replica buffer 110 based on the comparison result by the comparator circuit 151. The reference potential generating circuit 200 includes a potential generating section 210 activated in response to an enable signal EN and a potential generating section 220 activated regardless of the enable signal EN, and an output node of the potential generating section 210 and an output node of the potential generating section 220 are commonly connected to the comparator circuit 151. For this reason, the reference potential VREF can be correctly output before the enable signal EN is activated. <P>COPYRIGHT: (C)2012,JPO&INPIT
申请公布号 JP2012175416(A) 申请公布日期 2012.09.10
申请号 JP20110035683 申请日期 2011.02.22
申请人 ELPIDA MEMORY INC;HITACHI ULSI SYSTEMS CO LTD 发明人 YOKO HIDEYUKI;EGUCHI TAKANORI;ISHIMATSU MANABU
分类号 H03K19/0175 主分类号 H03K19/0175
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