| 摘要 |
<P>PROBLEM TO BE SOLVED: To improve properties of a semiconductor device. <P>SOLUTION: A configuration of a source plug P1S of a semiconductor device comprising an LDMOS, the source plugs P1S electrically connected with a source region of the LDMOS, a source wiring M1S arranged on the source plug P1S, a drain plug P1D electrically connected with a drain region of the LDMOS, and a drain wiring M1D arranged on the drain plug P1D is devised. The semiconductor device is configured such that the drain plug P1D is arranged on a line extending in a Y direction and the source plugs P1S each includes a plurality of divided source plugs P1S arranged in the Y direction at a predetermined distance. Like this, by dividing the source plug P1S, facing area of the source plug P1S with the drain plug P1D and the like is reduced thereby achieving reduction of parasitic capacitance. <P>COPYRIGHT: (C)2012,JPO&INPIT |
