Low Voltage Differential Signal Driving Circuit and Digital Signal Transmitter

摘要

A low voltage differential signal (LVDS) driving circuit and a digital signal transmitter with the LVDS driving circuit are provided. The LVDS driving circuit includes a positive differential output terminal and a negative differential output terminal and a transition accelerator. A differential output signal is provided by the positive and negative differential output terminals. When the differential output signal transits from low to high, the transition accelerator couples the positive differential output terminal to a high voltage source and couples the negative differential output terminal to a low voltage source. When the differential output signal transits from high to low, the transition accelerator couples the positive differential output terminal to the low voltage source and couples the positive output terminal to the high voltage source.