发明名称 |
Interface, memory system, and access control method |
摘要 |
An interface includes a controller that divides a burst access command into a plurality of command cycles and supplies the plurality of command cycles to a storage device including a plurality of blocks, and a block address converter that outputs an address at a first command cycle of the plurality of command cycles. The address is obtained by shifting at least one bit of an external block address input in response to the burst access command. The address is supplied to the storage device at the first command cycle, and the external block address is supplied to the storage device at a command cycle other than the first command cycle. |
申请公布号 |
US8255668(B2) |
申请公布日期 |
2012.08.28 |
申请号 |
US20100692234 |
申请日期 |
2010.01.22 |
申请人 |
OHHASHI SHINYA;TAKASHIMA SATOSHI;MIKI AKIHIRO;FUJITSU SEMICONDUCTOR LIMITED |
发明人 |
OHHASHI SHINYA;TAKASHIMA SATOSHI;MIKI AKIHIRO |
分类号 |
G06F12/02 |
主分类号 |
G06F12/02 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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