| 摘要 |
<P>PROBLEM TO BE SOLVED: To maintain excellent data holding characteristics while suppressing an increase in a threshold voltage distribution width caused by repeating a writing operation and an erasing operation. <P>SOLUTION: A memory cell array comprises: a charge storage film formed on a channel region through a gate insulating film; and a plurality of memory strings being arranged and comprising memory cells that include control gates formed on the charge storage film through an inter-gate insulating film and are series-connected. A control circuit controls various operations on the memory cell array. In a case where the control circuit executes an erasing operation on the memory cells, the control circuit applies a first voltage within a predetermined voltage range to the control gates prior to the erasing operation on the one hand, and executes a stress application operation before erasure, which applies stress to the memory cells by a potential difference between the first voltage and a second voltage having a smaller value than that of the first voltage by applying the second voltage to the channel region, prior to the erasing operation on the other hand. <P>COPYRIGHT: (C)2012,JPO&INPIT |
