发明名称 |
Burst mode clock and data recovery circuit and method |
摘要 |
Burst mode clock and data recovery (BCDR) circuit and method capable of fast data recovery of passive optical network (PON) traffic. An over-sampled data stream is generated from an input burst data signal and a phase interpolator generates sampling clock signals using a reference clock and phase information. A phase estimation unit (PEU) determines a phase error in the over-sampled data streams; and a phase retrieval unit sets the phase interpolator with the respective phase information of the input burst data signal prior to reception of the input burst data signal. |
申请公布号 |
US8243869(B2) |
申请公布日期 |
2012.08.14 |
申请号 |
US20060604748 |
申请日期 |
2006.11.28 |
申请人 |
DVIR AMIAD;WEBER RAVIV;AVISHAI DAVID;GOLDSTEIN ALEX;ELKANOVICH IGOR;SITTON GAL;BALTER MICHAEL;BROADLIGHT LTD. |
发明人 |
DVIR AMIAD;WEBER RAVIV;AVISHAI DAVID;GOLDSTEIN ALEX;ELKANOVICH IGOR;SITTON GAL;BALTER MICHAEL |
分类号 |
H03D3/24 |
主分类号 |
H03D3/24 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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