发明名称 METHODS FOR FORMING PLANARIZED HERMETIC BARRIER LAYERS AND STRUCTURES FORMED THEREBY
摘要 Methods and associated structures of forming a microelectronic structure are described. Those methods may comprise forming a conductive material in an interconnect opening within an interlayer dielectric material that is disposed on a substrate, forming a low density dielectric material on a surface of the dielectric layer and on a surface of the conductive material, and forming a high density dielectric barrier layer on the low density dielectric layer.
申请公布号 WO2012067955(A3) 申请公布日期 2012.08.02
申请号 WO2011US60304 申请日期 2011.11.11
申请人 INTEL CORPORATION;KING, SEAN;YOO, HUI JAE 发明人 KING, SEAN;YOO, HUI JAE
分类号 H01L21/28 主分类号 H01L21/28
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