发明名称 Memory utilizing oxide nanolaminates
摘要 Structures, systems and methods for transistors utilizing oxide nanolaminates are provided. One transistor embodiment includes a first source/drain region, a second source/drain region, and a channel region therebetween. A gate is separated from the channel region by a gate insulator. The gate insulator includes oxide insulator nanolaminate layers with charge trapping in potential wells formed by different electron affinities of the insulator nanolaminate layers.
申请公布号 US8228725(B2) 申请公布日期 2012.07.24
申请号 US20100790625 申请日期 2010.05.28
申请人 FORBES LEONARD;AHN KIE Y.;MICRON TECHNOLOGY, INC. 发明人 FORBES LEONARD;AHN KIE Y.
分类号 G11C16/00;G11C11/56;G11C16/02;G11C16/04;H01L27/115;H01L29/51;H01L29/792 主分类号 G11C16/00
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