发明名称 Memory system with pre-fetch operation
摘要 A memory system includes a controller that reads out, data written in a nonvolatile second storing area, from which data is read out and in which data is written in a page unit, to a first storing area as a cache memory included in a semiconductor memory and transfers the data to the host apparatus. The controller performs, when a readout request from the host apparatus satisfies a predetermined condition, at least one of first pre-fetch for reading out, to the first storing area data from a terminal end of a logical address range designated by a readout request being currently processed to a boundary of a logical address aligned in the page unit and a second pre-fetch for reading out data from the boundary of the logical address aligned in the page unit to a next boundary of the logical address.
申请公布号 US8225047(B2) 申请公布日期 2012.07.17
申请号 US20090394692 申请日期 2009.02.27
申请人 YANO JUNJI;MATSUZAKI HIDENORI;HATSUDA KOSUKE;KABUSHIKI KAISHA TOSHIBA 发明人 YANO JUNJI;MATSUZAKI HIDENORI;HATSUDA KOSUKE
分类号 G06F12/00 主分类号 G06F12/00
代理机构 代理人
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