发明名称 Block update for flash memory utilizing a cache page and cache block
摘要 The invention discloses a flash memory apparatus, including a plurality of blocks and a memory controller. The blocks include a first block, wherein the first block includes a first page. The memory controller receives a first data to be written into the first page of the first block. When the first page has already been written to, the memory controller further selects one of the blocks as a first cache block, writes the first data into a first cache page of the first cache block and records the number of the first block and the number of the first page into the first cache page. The memory controller further updates the first block according to the number of the first block and the number of the first page recorded in the first cache page when receiving an update command.
申请公布号 US8209487(B2) 申请公布日期 2012.06.26
申请号 US20090481800 申请日期 2009.06.10
申请人 LIN TSAI-CHENG;SILICON MOTION, INC. 发明人 LIN TSAI-CHENG
分类号 G06F12/00 主分类号 G06F12/00
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