发明名称 Voter tester for redundant systems
摘要 A tester is configured to access and test each redundant channel of a voter. The tester is disposed between the voter and a multitude of redundant circuits supplying redundant channel signals to the voter. The tester includes a number of input ports receiving the redundant channel signals as well as the test signals. In response to a number of logic combinations of the test signals, the voter generates output signals each corresponding to one of the redundant channel signals. In response to other logic combinations of the test signals, the voter generates a voted output signal. The voter is optionally a majority voter.
申请公布号 US8209591(B2) 申请公布日期 2012.06.26
申请号 US20090604292 申请日期 2009.10.22
申请人 SATTERFIELD HAROLD WILLIAM;WOOD GRADY;INTERSIL AMERICAS INC. 发明人 SATTERFIELD HAROLD WILLIAM;WOOD GRADY
分类号 G06F11/08 主分类号 G06F11/08
代理机构 代理人
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