发明名称 |
SEMICONDUCTOR MEMORY AND METHOD OF MANUFACTURING SEMICONDUCTOR MEMORY |
摘要 |
<P>PROBLEM TO BE SOLVED: To achieve three-dimensional integration and to improve the coupling ratio between a control gate electrode and a floating gate electrode while suppressing an increase in the number of steps. <P>SOLUTION: A semiconductor memory comprises: a columnar semiconductor 10; a floating gate electrode 8 formed on the side surface of the columnar semiconductor 10 via a tunnel insulating film 9; and control gate electrode 2, 3', and 4 formed via a blocking insulating film 7 so as to surround the floating gate electrode 8. <P>COPYRIGHT: (C)2012,JPO&INPIT |
申请公布号 |
JP2012119445(A) |
申请公布日期 |
2012.06.21 |
申请号 |
JP20100266984 |
申请日期 |
2010.11.30 |
申请人 |
TOSHIBA CORP |
发明人 |
IMAMURA TAKESHI;FUKUZUMI YOSHIAKI;AOCHI HIDEAKI;KITO TAKASHI;FUJIWARA TOMOKO;KAWASAKI KAORI;KIRISAWA RYOHEI |
分类号 |
H01L29/792;H01L21/336;H01L21/8247;H01L27/115;H01L29/788 |
主分类号 |
H01L29/792 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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