发明名称 SYSTEM AND METHOD FOR POWER MANAGEMENT
摘要 A system comprises a plurality of processor cores. The processor cores may comprise one or more application processor (AP) cores and a boot strap processor (BSP) core. A basic input/output system (BIOS) comprises an I/O device module to call a stall function in response to an I/O operation, a power management module that couples to the I/O device and a timer module that couples to the power management module. The power management module is to adjust a timer period of the timer module based on a stall delay of the stall function. The power management module may hook the stall function and compare the stall delay with a predetermined threshold and set the timer period to the stall delay in response to determining that the stall delay is longer. The power management module may put the BSP in a sleep mode during the timer period to save power.
申请公布号 US2012159204(A1) 申请公布日期 2012.06.21
申请号 US201113107133 申请日期 2011.05.13
申请人 TANG DI;ZIMMER VINCENT;EDWARDS JAMES;KHANNA RAHUL;LI YUFU;BAILEY ABDUL 发明人 TANG DI;ZIMMER VINCENT;EDWARDS JAMES;KHANNA RAHUL;LI YUFU;BAILEY ABDUL
分类号 G06F1/26 主分类号 G06F1/26
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