发明名称 Simulation apparatus, program, and method
摘要 A simulation apparatus is disclosed, including a hardware simulator and a CPU model. The hardware simulator activates one or more logical hardware models for verifying embedded software. The CPU model is one of the one or more logical hardware models which imitates a CPU which executes the embedded software, and to trigger the embedded software to operate without synchronization for each of instructions.
申请公布号 EP2466502(A2) 申请公布日期 2012.06.20
申请号 EP20110175703 申请日期 2011.07.28
申请人 FUJITSU SEMICONDUCTOR LIMITED 发明人 KUYA, RYO;NAKAMURA, YASUKI;TERASHIMA, HIROSHI;YOSHINO, TATSUYA;KIMURA, MASAHARU
分类号 G06F17/50 主分类号 G06F17/50
代理机构 代理人
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