发明名称 |
SEMICONDUCTOR MEMORY DEVICE |
摘要 |
This memory includes: bit lines; word lines crossing the bit lines; a memory cell array including memory cells provided to correspond to intersections between the bit lines and the word lines, respectively. A sense amplifier is connected to the bit lines and detects data stored in the memory cells. A word line driver controls a voltage of the word lines. An error-correcting unit includes a first error-correcting circuit having a first error-correcting capability and a second error-correcting circuit having a second error-correcting capability. The memory cells connected to each of the word lines in the memory cell block constitute a page. The error-correcting unit drives one of or both of the first and second error-correcting circuits during a data read operation or a data write operation according to a step count which is number of times of stepping up the voltage of the word lines during the data write operation.
|
申请公布号 |
US2012151301(A1) |
申请公布日期 |
2012.06.14 |
申请号 |
US201113176030 |
申请日期 |
2011.07.05 |
申请人 |
IZUMI TATSUO;NOGUCHI MITSUHIRO;KABUSHIKI KAISHA TOSHIBA |
发明人 |
IZUMI TATSUO;NOGUCHI MITSUHIRO |
分类号 |
H03M13/05;G06F11/10 |
主分类号 |
H03M13/05 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|