发明名称 |
METHODS AND SYSTEMS FOR ENERGY EFFICIENCY AND ENERGY CONSERVATION INCLUDING ENTRY AND EXIT LATENCY REDUCTION FOR LOW POWER STATES |
摘要 |
Systems and methods for entry and exit latency reduction for low power states are described. In one embodiment, a computer implemented method initiates an energy-efficient low power state (e.g., deep sleep state) to reduce power consumption of a device. The method sets a power supply voltage that provides sufficient power to a dual power supply array for retention of states. Logic is powered down in this low power state.
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申请公布号 |
US2012151235(A1) |
申请公布日期 |
2012.06.14 |
申请号 |
US201113333753 |
申请日期 |
2011.12.21 |
申请人 |
NASRULLAH JAWAD;KWAN KELVIN;KULKARNI JAYDEEP P.;KHELLAH MUHAMMAD M. |
发明人 |
NASRULLAH JAWAD;KWAN KELVIN;KULKARNI JAYDEEP P.;KHELLAH MUHAMMAD M. |
分类号 |
G06F1/32 |
主分类号 |
G06F1/32 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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