发明名称 STRESS-GENERATING STRUCTURE FOR SEMICONDUCTOR-ON-INSULATOR DEVICES
摘要 A stack pad layers including a first pad oxide layer, a pad nitride layer, and a second pad oxide layer are formed on a semiconductor-on-insulator (SOI) substrate. A deep trench extending below a top surface or a bottom surface of a buried insulator layer of the SOI substrate and enclosing at least one top semiconductor region is formed by lithographic methods and etching. A stress-generating insulator material is deposited in the deep trench and recessed below a top surface of the SOI substrate to form a stress-generating buried insulator plug in the deep trench. A silicon oxide material is deposited in the deep trench, planarized, and recessed. The stack of pad layer is removed to expose substantially coplanar top surfaces of the top semiconductor layer and of silicon oxide plugs. The stress-generating buried insulator plug encloses, and generates a stress to, the at least one top semiconductor region.
申请公布号 US2012139081(A1) 申请公布日期 2012.06.07
申请号 US201213370898 申请日期 2012.02.10
申请人 ZHU HUILONG;GREENE BRIAN J.;CHIDAMBARRAO DURESETI;FREEMAN GREGORY G.;INTERNATIONAL BUSINESS MACHINES CORPORATION 发明人 ZHU HUILONG;GREENE BRIAN J.;CHIDAMBARRAO DURESETI;FREEMAN GREGORY G.
分类号 H01L29/00;H01L21/762 主分类号 H01L29/00
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