STATIC RANDOM ACCESS MEMORY (SRAM) WRITE ASSIST CIRCUIT WITH LEAKAGE SUPPRESSION AND LEVEL CONTROL
摘要
<p>A static random access memory (SRAM) write assist circuit (400) with leakage suppression and level control is described. In one embodiment, the SRAM write assist circuit (400) increases the amount of boost provided in a write cycle, while in another embodiment, the SRAM write assist circuit (400) limits the amount of boost provided at higher supply voltages.</p>
申请公布号
WO2012074790(A1)
申请公布日期
2012.06.07
申请号
WO2011US61416
申请日期
2011.11.18
申请人
INTERNATIONAL BUSINESS MACHININES CORPORATION;ARSOVSKI, IGOR;PILO, HAROLD;RAMADURAI, VINOD
