摘要 |
<p>PURPOSE: A semiconductor device and a manufacturing method thereof are provided to minimize a parasitic capacitance value by forming a spacer of high dielectric material at the upper side of a buried gate. CONSTITUTION: An element isolation region(120) defining an active area(110) is formed on a semiconductor substrate(100). A recess(160) is formed by etching the semiconductor substrate. A gate electrode pattern(180) is formed within the recess. A high dielectric material is formed at the upper side of the gate electrode pattern, the active area, and the element isolation region. A spacer(200) is formed at the upper side of the gate electrode pattern within the recess by etching the high dielectric material.</p> |