发明名称 MEMORY SYSTEM
摘要 A memory system includes a memory cell array including a plurality of memory cells electrically connected to pairs of bit lines once a word line is activated; latch portions connected to respective pairs of bit lines; a sense amplifier connected to the latch portions; and a control circuit configured to control the latch portions for a reading operation in order that data in all memory cells connected to the word line, once selected, come to be held in the corresponding latch portions as a group.
申请公布号 US2012134198(A1) 申请公布日期 2012.05.31
申请号 US201113306175 申请日期 2011.11.29
申请人 YAMAGUCHI KOICHIRO;KASHIWAGI JIN;KABUSHIKI KAISHA TOSHIBA 发明人 YAMAGUCHI KOICHIRO;KASHIWAGI JIN
分类号 G11C11/413;G11C7/06;G11C7/10 主分类号 G11C11/413
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