发明名称 MUTE CIRCUIT
摘要 <P>PROBLEM TO BE SOLVED: To eliminate the influence of switching noise without connecting a low pass filter to an output side by preventing a timing when all switches are off during mute control. <P>SOLUTION: A mute circuit includes a switch circuit 4 and a control circuit 5. The control circuit 5 controls n switches to be turned on in sequence from a switch with a maximum on resistance value to a switch with a minimum on resistance value when an output voltage of an operational amplifier 1 rises, such that a change in voltage applied to a load R<SB POS="POST">L</SB>when the n switches are sequentially turned on is 1/n of a voltage applied to the load R<SB POS="POST">L</SB>when all the n switches are turned on. <P>COPYRIGHT: (C)2012,JPO&INPIT
申请公布号 JP2012105182(A) 申请公布日期 2012.05.31
申请号 JP20100253777 申请日期 2010.11.12
申请人 NEW JAPAN RADIO CO LTD 发明人 NAKASONE HIDEYUKI
分类号 H03F1/00;H03F3/183 主分类号 H03F1/00
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