发明名称 |
APPARATUS HAVING A WIRING BOARD AND MEMORY DEVICES |
摘要 |
An address signal line having a stub structure connects between at least three memory elements and a data transferring element and transmits address signals for the memory elements. An address terminal of the data transferring element has an impedance lower than a characteristic impedance of the address signal line. A wiring length TL0 from the data transferring element to a first branch point S1 where a branch line is branched at a shortest distance from the data transferring element is configured to become equal to or greater than a wiring length TL1 from the first branch point S1 to a second branch point S2 where a second branch line is branched. A wiring length TL3 from the second branch point S2 to a third branch point S3 where a third branch line is branched is configured to become greater than the wiring lengths TL0 and TL1.
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申请公布号 |
US2012127675(A1) |
申请公布日期 |
2012.05.24 |
申请号 |
US201213363396 |
申请日期 |
2012.02.01 |
申请人 |
HIRAISHI ATSUSHI;SUGANO TOSHIO;YAMAGUCHI MASAHIRO;NISHIO YOJI;HARA TSUTOMU;AOKI KOICHIRO;ELPIDA MEMORY, INC. |
发明人 |
HIRAISHI ATSUSHI;SUGANO TOSHIO;YAMAGUCHI MASAHIRO;NISHIO YOJI;HARA TSUTOMU;AOKI KOICHIRO |
分类号 |
H05K1/18 |
主分类号 |
H05K1/18 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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