发明名称 TERMINATION CIRCUIT FOR ON-DIE TERMINATION
摘要 In a semiconductor device having a terminal connected to an internal portion, a termination circuit for providing on-die termination for the terminal of the device. The termination circuit comprises a plurality of transistors, including at least one NMOS transistor and at least one PMOS transistor, connected between the terminal and a power supply; and control circuitry for driving a gate of each of NMOS transistor with a corresponding NMOS gate voltage and for driving a gate of each PMOS transistor with a corresponding PMOS gate voltage, the control circuitry being configured to control the NMOS and PMOS gate voltages so as to place the transistors in an ohmic region of operation when on-die termination is enabled. The power supply supplies a voltage that is less than each said NMOS gate voltage and greater than each said PMOS gate voltage.
申请公布号 US2012126849(A1) 申请公布日期 2012.05.24
申请号 US201113284338 申请日期 2011.10.28
申请人 GILLINGHAM PETER 发明人 GILLINGHAM PETER
分类号 H03K19/003 主分类号 H03K19/003
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