发明名称 |
Precision sampling circuit |
摘要 |
A sampling circuit including a number of state elements or flip-flops. The state elements or flip-flops are each clocked by a signal that causes them to sample their inputs at a predetermined time. In sampling a plurality of digital inputs, a captured delay chain value is stored by the sampling circuit. Each flip-flop holds one bit and together the total number of bits represent this captured delay chain value. Each flip-flop is provided with a data and a data complement signal as an input, the data and data complement signal being substantially simultaneous. In operation each flip-flop includes a direct connection of the data and data complement signals to a pair of transistors that further operate to capture the logical value carried by the input. |
申请公布号 |
US8179165(B2) |
申请公布日期 |
2012.05.15 |
申请号 |
US20090430840 |
申请日期 |
2009.04.27 |
申请人 |
LE HANH-PHUC;MASLEID ROBERT P.;ORACLE AMERICA, INC. |
发明人 |
LE HANH-PHUC;MASLEID ROBERT P. |
分类号 |
G11C27/02 |
主分类号 |
G11C27/02 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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