发明名称 MULTI-CHIP STACKING METHOD TO REDUCE VOIDS BETWEEN STACKED CHIPS
摘要 A multi-chip stacking method to reduce voids between stacked chips is revealed. A first chip is disposed on a substrate, and a plurality of first bonding wires are formed by wire bonding to electrically connect the first chip and the substrate. A second chip is disposed on an active surface of the first chip where a FOW (film over wire) adhesive is formed on a back surface of the second chip. The FOW adhesive partially encapsulates the first bonding wires and adheres to the active surface of the first chip. Then, the substrate is placed in a pressure oven to provide a positive pressure greater than one atm during thermally curing the FOW adhesive with exerted pressures. Accordingly, voids can be reduced inside the FOW adhesive during the multi-chip stacked processes where issues of poor adhesion and popcorn between chips can be avoided.
申请公布号 US2012115277(A1) 申请公布日期 2012.05.10
申请号 US201113311257 申请日期 2011.12.05
申请人 WALTON ADVANCED ENGINEERING INC. 发明人 LEE KUO-YUAN;CHEN YUNG-HSIANG;CHIU WEN-CHUN
分类号 H01L21/56;H01L21/78 主分类号 H01L21/56
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