| 摘要 |
A power electronic package includes: first and second high thermal conductivity insulating non-planar substrates 1, 2; and multiple semiconductor chips 20 and electronic components 30 between the substrates. Each substrate includes multiple electrical insulator layers 77 and patterned electrical conductor layers connecting to the electronic components, and further includes multiple raised regions or posts 70, which are bonded together so that the substrates are mechanically and electrically connected. The number, arrangement, and shape of the raised regions or posts are adjusted to have mechanical separation between the substrates. The electrical conductor layers are separated and isolated one another so that the multiple electric circuits are provided on at least one of the substrates. Recesses formed by etching may be provided on either one or both substrates for receiving the chips 20 and components 30. |
