发明名称 SEMICONDUCTOR LAMINATE STRUCTURE AND MANUFACTURING METHOD OF THE SAME
摘要 <P>PROBLEM TO BE SOLVED: To reduce internal stress and warpage. <P>SOLUTION: A semiconductor laminate structure manufacturing method comprises the steps of (a) depositing, at first, a first film 3 of an Si-based oxide or nitride having a thermal expansion coefficient lower than that of a substrate 2 and Young's modulus higher than that of the substrate 2 on a rear face of the substrate 2 at an ambient temperature, (b)subsequently applying heat until reaching a high temperature, and after that, (c) depositing a buffer layer 4 of AlN and a second film 5 of a III-V nitride semiconductor having a thermal expansion coefficient higher than that of the substrate 2 on a surface 2a of the substrate 2, and thereafter, and (d) eliminating the warpage and flattening the substrate 2 and all the films 3, 4, 5 of a semiconductor structure 1 by a temperature drop of the semiconductor laminate structure 1 to the ambient temperature. <P>COPYRIGHT: (C)2012,JPO&INPIT
申请公布号 JP2012084913(A) 申请公布日期 2012.04.26
申请号 JP20110281433 申请日期 2011.12.22
申请人 SHARP CORP 发明人 SATO JUNICHI
分类号 H01L21/20 主分类号 H01L21/20
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