发明名称 |
INTEGRATED DATA MODEL BASED FRAMEWORK FOR DRIVING DESIGN CONVERGENCE FROM ARCHITECTURE OPTIMIZATION TO PHYSICAL DESIGN CLOSURE |
摘要 |
Systems and methods are disclosed to automatically synthesize a custom integrated circuit by receiving a specification of the custom integrated circuit including computer readable code and one or more constraints on the custom integrated circuit; encoding architecture level knowledge in a data model to generate and pass new constraints for physical synthesis of a chip specification uniquely customized to the computer readable code; receiving a look-ahead cost function during architecture optimization consistent with cost observed later in the flow after detailed physical synthesis is performed, wherein the look-ahead cost function is generated from a prior iteration and supplied to a subsequent iteration through the data model; automatically translating information available at one optimization point into a constraint for another optimization point invoked at a different place in the design flow using the data model; and synthesizing a computer readable description of the chip specification into the custom integrated circuit for semiconductor fabrication. |
申请公布号 |
US2012096417(A1) |
申请公布日期 |
2012.04.19 |
申请号 |
US20100906785 |
申请日期 |
2010.10.18 |
申请人 |
DURBHA ANANTH;NG PIUS;PADMANABHAN SATISH |
发明人 |
DURBHA ANANTH;NG PIUS;PADMANABHAN SATISH |
分类号 |
G06F17/50;G06F9/45;G06F9/455 |
主分类号 |
G06F17/50 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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