| 摘要 |
Exemplary embodiments of a compactor for compacting test responses are disclosed. In certain embodiments, the compactor comprises circular registers and has multiple inputs. The circular registers can have lengths that are relatively prime or prime. In certain implementations, the compactors are able to detect errors commonly observed from real defects, such as errors of small multiplicity and burst errors. Certain embodiments of the compactor operate according to modular arithmetic. Furthermore, because circular registers do not multiply errors or unknown states, embodiments of the disclosed compactors can tolerate one or more unknown states or at least exhibit a desirably high tolerance of such states. |
