发明名称 REGULATOR CIRCUIT
摘要 <P>PROBLEM TO BE SOLVED: To provide a regulator circuit which has a current control circuit connected to an opposite phase output node of a differential amplifier circuit and is capable of suppressing lowering of DC gain due to lowering of impedance in the opposite phase output node. <P>SOLUTION: A circuit shown in Fig. 2 is the regulator circuit having the current control circuit connected to the opposite phase output node of the differential amplifier circuit. The current control circuit includes: a second transistor MP2 as a current detection transistor supplying a current proportional to a current flowing through a first transistor MP1, a first constant current source MN1 connected to a drain end of the second transistor MP2; and a current mirror having an input side connected to a shunt node between the drain end of the second transistor MP2 and the first constant current source MN1 and an output side connected to the opposite phase output node of the differential amplifier circuit. The current mirror is composed of the transistor MN2 on the input side and the transistor MN3 on the output side. <P>COPYRIGHT: (C)2012,JPO&INPIT
申请公布号 JP2012073799(A) 申请公布日期 2012.04.12
申请号 JP20100217792 申请日期 2010.09.28
申请人 ASAHI KASEI ELECTRONICS CO LTD 发明人 ISHIDA MANABU
分类号 G05F1/56 主分类号 G05F1/56
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