| 摘要 |
A memory system (10) includes multiple memory layers (12) that may be identical when manufactured and may be readily customized before or after the layers (12) are arranged into a three-dimensional stack so that data may be sent to or retrieved from individual layers (12), either serially or in parallel, and independently of the other layers (12). Each memory layer comprises an array (14) of memory cells each coupled to a common data line (16), and a set of N input/output (I/O) lines (18) each coupled to the common data line (16), only one of the set of N/I/O lines (18) providing an electrical communication path to the common data line (16), and a set of N electrical connectors (20) each electrically connecting a respective output node to a respective set of N corresponding I/O lines (18). <IMAGE> |
