发明名称 A SEMICONDUCTOR MEMORY APPARATUS
摘要 PURPOSE: A semiconductor memory device is provided to automatically set replica delay time of a DDL circuit by sensing a phase difference between an external clock and a data output strobe signal. CONSTITUTION: A DDL circuit(80) includes a replica(50) which generates a feedback clock by delaying a DDL clock. The DLL circuit compares a phase difference between the feedback clock and the external clock and changes delay time according to a phase comparison result. The DDL circuit generates a DDL clock by delaying the external clock with the changed delay time. A control unit includes a replica delay control unit(70). The replica delay control unit changes the delay time of the replica by determining the phase difference between the external clock and the data output strobe signal.
申请公布号 KR20120033925(A) 申请公布日期 2012.04.09
申请号 KR20100095691 申请日期 2010.09.30
申请人 SK HYNIX INC. 发明人 YUN, WON JOO;KIM, YONG JU;CHOI, HAE RANG
分类号 G11C8/00;G11C7/10;G11C7/22 主分类号 G11C8/00
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