发明名称 STACKED SEMICONDUCTOR PACKAGE AND MANUFACTURING METHOD THEREOF
摘要 PURPOSE: A stacked semiconductor package and a manufacturing method thereof are provided to prevent void generation between a substrate and an embedded semiconductor chip, thereby improving reliability of the semiconductor package. CONSTITUTION: A cavity is formed on a part of one surface of a first semiconductor package(110). A first terminal(130) is formed on a part of the upper surface of the first semiconductor package. A second terminal(140) is formed on one surface of a first semiconductor chip(112) which is mounted on the cavity of the first semiconductor package. A second semiconductor package(120) is laminated on the upper part of the first semiconductor package. A second semiconductor chip(122) which is mounted on a cavity of the second semiconductor package includes the second terminal on one surface of the second semiconductor chip.
申请公布号 KR20120033006(A) 申请公布日期 2012.04.06
申请号 KR20100094587 申请日期 2010.09.29
申请人 HANA MICRON CO., LTD. 发明人 HWANG, CHUL KYU;JANG, CHEOL HO
分类号 H01L23/48;H01L23/04;H01L23/12 主分类号 H01L23/48
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