| 摘要 |
<P>PROBLEM TO BE SOLVED: To design logic circuits which share a shared resource without providing an arbitration circuit in the logic circuits. <P>SOLUTION: A design device in an embodiment has: a scheduling unit; a group ID assigning unit; a transition violation detecting unit; and a state inserting unit. The scheduling unit generates a plurality of states which change on the basis of a clock in accordance with a control data flow graph generated from a behavioral description and shared resource schedule information. The group ID assigning unit assigns a group ID to the plurality of states under a predetermined condition. The transition violation detecting unit detects whether or not there is a transition violation between the plurality of states to which the group ID is assigned. The state inserting unit adds a new state between the states in which a transition violation is detected if the transition violation is detected in the transition violation detecting unit. <P>COPYRIGHT: (C)2012,JPO&INPIT |
