| 摘要 |
A transistor (10) comprises a plurality of active semiconductor layers (14,16,17,18) on a substrate (12). A source contact (20) and a drain contact (22) are in electrical contact with the active layers with space between the source and drain contacts on the topmost of the active layers. A gate (152) is in electrical contact with the topmost of the active layers, between the source and drain contacts. A spacer layer (154) is on and covers substantially all of the surface of the active layers, between the gate and the source and drain contacts. The gate is not covered by the spacer layer (154) and the spacer layer comprises a plurality of spacer layers (154,158) in a step arrangement between the gate and the drain contact. A field plate (156,159) on the spacer layer is integrated with the gate, the field plate being on the spacer layer step arrangement. |
