DMA CONTROLLER AND DATA READOUT DEVICE

摘要

A DMA controller (40) includes: a read start address register (402) for storing a read start address where readout is to be started; a read data size register (403) for storing the size of data to be read out by one readout process; an offset register (404) for storing an offset for updating the read start address after completion of the readout process; a repetition upper limit register (405) for storing an upper limit of the number of repetitions of the readout process; and a repetition counter register (406) for storing the number of repetitions of the readout process. A control unit (401) of the DMA controller (40) outputs an interrupt signal indicating that processing of the DMA controller (40) has completed when a value stored in the repetition counter register (406) reaches a value stored in the repetition upper limit register (405).