| 摘要 |
<P>PROBLEM TO BE SOLVED: To provide a ferroelectric random access memory capable of suppressing effect of an adjacent bit line and improving its readout performance. <P>SOLUTION: A ferroelectric random access memory of the present invention includes: plural memory cells MC0 and MC1 which are arranged in a matrix state and each of which has a ferroelectric capacitor; bit lines BL and /BL which extend so as to face each other in parallel and to which cell signals are read out from the MC0 and MC1; a bias circuit 13 which fixes the /BL at a first power-supply potential when a cell signal is read out from the MC0 to the BL, and then sets the /BL at a second power-supply potential; a dummy cell circuit 12 which sets the /BL at a read-out reference potential after the bias circuit 13 sets the /BL at the second power-supply potential; and a CMOS sense amplifier 11 which compares and amplifies the BL, to which the cell signal is read out, and the /BL, to which the dummy cell circuit 12 sets the read-out reference potential. <P>COPYRIGHT: (C)2012,JPO&INPIT |
