发明名称 MULTISTREAM PREFETCH BUFFER
摘要 A prefetching system receives a memory read request having an associated address. In response to a determination that a most significant portion of the associated address is not present within slots of an array for storing the most significant portion of predicted addresses, a prefetch FIFO (First In-First Out) counter is modified to point to a next slot of the array and a new predicted address is generated in response to the received most significant portion of the associated address and is placed in the next slot of the array. The prefetch FIFO counter cycles through the slots of the array before wrapping around to a first slot of the array for storing the most significant portion of predicted addresses.
申请公布号 US2012079202(A1) 申请公布日期 2012.03.29
申请号 US201113175942 申请日期 2011.07.04
申请人 CHIRCA KAI 发明人 CHIRCA KAI
分类号 G06F12/08 主分类号 G06F12/08
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