发明名称 Integrated circuit fabrication process convergence
摘要 A method for selecting a process for a new integrated circuit design. Structures that are used in existing integrated circuit designs are identified, as well as the photolithography processes that are used to fabricate integrated circuits that are based on the existing designs. A process window is determined for each structure/process combination by running tests on different combinations of process variables, and a database of the process windows is compiled. The structures that are to be used in the new integrated circuit design are identified, and the process windows associated with the identified structures for the new integrated circuit design are selected from the database. The selected process windows for the identified structures are overlaid, grouped by common process, thereby creating a resultant process window for each process. One of the processes is selected, based at least in part on comparative sizes of the resultant process windows.
申请公布号 US8146023(B1) 申请公布日期 2012.03.27
申请号 US20090565787 申请日期 2009.09.24
申请人 KUMAR BHAVANI P.;KLA-TENOR CORPORATION 发明人 KUMAR BHAVANI P.
分类号 G06F17/50;G06F11/22 主分类号 G06F17/50
代理机构 代理人
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