发明名称 METHOD FOR FORMING VIA HOLE IN PRINTED CIRCUIT BOARD
摘要 PURPOSE: A via hole formation method of a printed circuit substrate is provided to easily arrange a plating layer within a via-hole by combining a conductive post and a base substrate in which the via-hole is formed. CONSTITUTION: A via hole is formed by punching a base substrate(S100). A conductive post is arranged on a carrier(S110). The base substrate in which the via hole is formed is combined with the carrier in which the conductive post is arranged(S120). The inside of the via hole is filled with plug(S130). The carrier is eliminated(S140). The upper surface and the lower surface of the base substrate is buffed and polished(S150). A desmear process and a plating process are performed on the upper surface and lower surface of the base substrate(S160). A circuit is formed on the plated base substrate(S170).
申请公布号 KR101128559(B1) 申请公布日期 2012.03.23
申请号 KR20100089406 申请日期 2010.09.13
申请人 SAMSUNG ELECTRO-MECHANICS CO., LTD. 发明人 LEE, JEONG SUP;RYU, CHANG SUP;NAM, HYO SEUNG;JEONG, KWANG OK
分类号 H05K3/42;H05K3/04 主分类号 H05K3/42
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