| 摘要 |
According to one embodiment, a semiconductor memory device includes memory cell units including serially-connected memory cells, which includes a semiconductor pillar and conductive and insulation films surrounding the semiconductor pillar. The memory cell units constitute blocks each of which is the minimum unit of data erasure. A pipe layer in at least one pair of adjacent first and second memory cell units of the memory cell units includes a semiconductor layer connected to the semiconductor pillars in the first and second memory cell units, and are connected to first ends of the first and second memory cell units. A conductive plate between the first ends of the first and second memory cell units and the semiconductor substrate contain the pipe layers of at least two blocks and controls conduction of the pipe layers. A supply path structure is connected to the plate and transmitting a potential the plate. |
