| 摘要 |
<P>PROBLEM TO BE SOLVED: To improve performance characteristics of an n-channel field-effect transistor using a strained silicon technique without degrading performance characteristics of a p-channel field-effect transistor, in a CMIS device. <P>SOLUTION: A source/drain (an n-type extended region 8 and an n-type diffusion region 13) of an nMIS and a source/drain (a p-type extended region 7 and a p-type diffusion region 11) of a pMIS having a desired concentration profile and resistance are formed, and then an Si:C layer 16 having a desired strain amount is formed in the n-type diffusion region 13, thereby obtaining the most suitable parasitic resistance in the source/drain of the nMIS and the most suitable strain amount of the Si:C layer 16. The performance of the heat treatment for a short time less than or equal to 1 ms suppresses a variation in the concentration profile of the p-type impurity of the p-type extended region 7 and the p-type diffusion region 11 that are previously formed. <P>COPYRIGHT: (C)2012,JPO&INPIT |
