发明名称 REPLAYING ARCHITECTURAL EXECUTION WITH A PROBELESS TRACE CAPTURE
摘要 A system and method provide for capturing architecture data for software executing on a system, wherein the architecture data can include state data and event data. The captured architecture data may be replayed in a simulator, wherein failure information corresponding to the software is obtained from the simulator.
申请公布号 WO2012009105(A3) 申请公布日期 2012.03.08
申请号 WO2011US41086 申请日期 2011.06.20
申请人 INTEL CORPORATION;DEVARAJAN, RAMESH;FRANKO, JAEMON, D. 发明人 DEVARAJAN, RAMESH;FRANKO, JAEMON, D.
分类号 G06F11/36;G06F9/455 主分类号 G06F11/36
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