发明名称 Electrolytic depositon and via filling in coreless substrate processing
摘要 Electronic assemblies including coreless substrates and their manufacture using electrolytic plating, are described. One method includes providing a core comprising a metal, and forming a dielectric material on the core. The method also includes forming vias in the dielectric material, the vias positioned to expose metal regions. The method also performing an electrolytic plating of metal into the vias and on the metal regions, wherein the core is electrically coupled to a power supply during the electrolytic plating of metal into the vias and delivers current to the metal regions. The method also includes removing the metal core after the electrolytic plating of metal into the vias. Other embodiments are described and claimed.
申请公布号 US8127979(B1) 申请公布日期 2012.03.06
申请号 US20100890662 申请日期 2010.09.25
申请人 WU TAO;WATTS NICOLAS R.;INTEL CORPORATION 发明人 WU TAO;WATTS NICOLAS R.
分类号 B23K31/02;C23D5/02 主分类号 B23K31/02
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