发明名称 DELAY CIRCUIT
摘要 <P>PROBLEM TO BE SOLVED: To cancel a delay time generated in a delay circuit, which is caused by fluctuation in a temperature or a voltage. <P>SOLUTION: In a delay circuit, a plurality of inverters INVo and INVe, each of which consists of an N-channel type first transistor and a P-channel type second transistor connected in series, are connected alternately. The delay circuit has a P-channel type third transistor connected between a power supply wire VDD and an input node 'in' of the inverter INVe. Due to the existence of the third transistor, characteristic fluctuation of the second transistor included in each of the plurality of inverters is canceled even when a temperature or a voltage or the like fluctuates. Thereby, when a temperature or a voltage or the like fluctuates, delay amount fluctuation in the whole delay circuit can be considered as characteristic fluctuation of the first transistor. <P>COPYRIGHT: (C)2012,JPO&INPIT
申请公布号 JP2012044280(A) 申请公布日期 2012.03.01
申请号 JP20100181329 申请日期 2010.08.13
申请人 ELPIDA MEMORY INC 发明人 MATSUI YOSHINORI
分类号 H03K5/14 主分类号 H03K5/14
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